HCPL-7510 Datasheet, PDF (8/16 Pages) Agilent(Hewlett-Packard) – Isolated Linear Sensing IC

Switching Specifications (AC)
Over recommended operating conditions unless otherwise specified.
Parameter
Symbol Min. Typ. Max. Units Test Conditions
V_IN to V_OUT Signal Delay (50 – 10%) t_PD10
2.2 4
µs
V_IN+ = 0 mV to 200 mV step
V_IN to V_OUT Signal Delay (50 – 50%) t_PD50
3.4 5
µs
V_IN to V_OUT Signal Delay (50 – 90%) t_PD90
5.2 9.9 µs
V_OUT Rise Time (10 – 90%)
t_R
3.0 7
µs
V_OUT Fall Time (10 – 90%)
t_F
3.2 7
µs
V_OUT Bandwidth (-3 dB)
BW 50 100
kHz V_IN+ = 200 mV_pk-pk
V_OUT Noise
N_OUT
31.5
mVrms V_IN+ = 0 V
Common Mode Transient
Immunity
CMTI 10 15
kV/µs T_A = 25°C, V_CM = 1000 V
Fig. Note
13
14
15
Package Characteristics
Parameter
Input-Output Momentary
Withstand Voltage
Input-Output Resistance
Input-Output Capacitance
Symbol Min.
VISO
3750
R_I-O
CI-O
Typ. Max.
>10⁹
1.4
Units
Vrms
Test Conditions
TA = 25°C, RH < 50%
Fig. Note
6
Ω
V_I-O = 500 V
pF
Freq = 1 MHz
Notes:
General Note: Typical values were taken from a sample of nominal units operating at nominal conditions (VDD1 = VDD2 = 5 V, VREF = 4.0 V, Temperature =
25°C) unless otherwise stated. Nominal plots shown from Figure 1 to 11 represented the drift of these nominal units from their nominal operating
conditions.
1. Input Offset Voltage is defined as the DC Input Voltage required to obtain an output voltage of VREF/2.
2. Gain is defined as the slope of the best-fit line of the output voltage vs. the differential input voltage (VIN+ - VIN-) over the specified input range. Gain
is derived from VREF/512 mV; e.g. VREF = 5.0, gain will be 9.77 V/V.
3. Nonlinearity is defined as half of the peak-to-peak output deviation from the best-fit gain line, expressed as a percentage of the full-scale output
voltage range.
4. NL200 is the nonlinearity specified over an input voltage range of ±200 mV.
5. NL100 is the nonlinearity specified over an input voltage range of ±100 mV.
6. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage •4500 Vrms for 1 second (leakage detection current
limit, II-O < 5 µA). This test is performed before the 100% production test for the partial discharge (method b) shown in
IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table, if applicable.
7. CMRR is defined as the ratio of the differential signal gain (signal applied differentially between pins 2 and 3) to the common-mode gain (input pins
tied together and the signal applied to both inputs at the same time), expressed in dB.
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