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HCPL-7510 Datasheet, PDF (12/16 Pages) Agilent(Hewlett-Packard) – Isolated Linear Sensing IC
As shown in Figure 17, 0.1 µF
bypass capacitors (C1, C2)
should be located as close as
possible to the pins of the
HCPL-7510. The bypass
capacitors are required
because of the high-speed
digital nature of the signals
inside the HCPL-7510. A 0.01
µF bypass capacitor (C2) is
also recommended at the
input due to the switched-
capacitor nature of the input
circuit. The input bypass
capacitor also forms part of
the anti-aliasing filter, which
is recommended to prevent
high frequency noise from
aliasing down to lower
frequencies and interfering
with the input signal. The
input filter also performs an
important reliability function—it
reduces transient spikes from
ESD events flowing through the
current sensing resistor.
PC Board Layout
The design of the printed
circuit board (PCB) should
follow good layout practices,
such as keeping bypass
capacitors close to the supply
pins, keeping output signals
away from input signals, the
use of ground and power
planes, etc. In addition, the
layout of the PCB can also
affect the isolation transient
immunity (CMTI) of the
HCPL-7510, due primarily to
stray capacitive coupling
between the input and the
output circuits. To obtain
optimal CMTI performance, the
layout of the PC board should
minimize any stray coupling
by maintaining the maximum
possible distance between the
input and output sides of the
circuit and ensuring that any
ground or power plane on the
PC board does not pass
directly below or extend much
wider than the body of the
HCPL-7510.
FLOATING
POSITIVE
SUPPLY
HV+
GATE DRIVE
CIRCUIT
MOTOR
+ R1 -
RSENSE
U1
78L05
IN OUT
C1
0.1 µF
R5
68 Ω
HV-
C2
0.1 µF
C3
0.01 µF
1 VDD1
2 VIN+
3 VIN-
4 GND1
VDD2 8
VOUT 7
VREF 6
GND2 5
HCPL-7510
+5 V
C4
C5
C6
C6 = 150 pF
C4 = C5 = 0.1 µF
µC
A/D
VREF
GND
Figure 17. Recommended HCPL-7510 application circuit.
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