HDMP-1685A Datasheet, PDF (6/21 Pages) Agilent(Hewlett-Packard) – 1.25 Gbps Four Channel SerDes with 5-pin DDR SSTL-2 Parallel Interface

HDMP-1685A Timing Characteristics – Transmitter Sections
T_A = 0°C to T_C = 85°C, V_CC = 3.15 V to 3.45 V
Symbol
Parameter
t_TXCT[2]
TX [0:3][0:4] Input Data and TC Clock Transition Range
t_TXCV[2]
TX [0:3][0:4] Input Data and TC Clock Valid Time
t_txlat^[1]
Transmitter Latency
Units Min. Typ.
ps
ps
2400
ns
4
bits
5
Max.
1600
Note:
1. The transmitter latency, as shown in Figure 4, is defined as the time between the leading edge of the first half of a parallel 10-bit word and the
leading edge of the first transmitted serial output bit of that 10-bit word.
2. Agilent‘s HDMP-1685A internally generates another clock which is 90 degrees out of phase with the TC clock supplied. This clock, which will
have its edges at the center of the data valid eye, is used to clock in the TX[0:4] data. Setup and hold times are taken care of by the
HDMP-1685A provided the specifications indicated are met.
TX[0:3][0:4]
TC
TXCV
8 ns
TXCT
TXCV
Figure 3. Transmitter section parallel input timing.
SO[0:3]±
TX[0:3][0:4]
10-BIT CHAR A
CHAR B[4:0]
TXLAT
CHAR B[9:5]
TC
Figure 4. Transmitter section latency. TX[0] is first on serial wire.
5
10-BIT CHAR B
TX[0]
TX[9]