HMC5983-DEM Datasheet, PDF (20/28 Pages) Honeywell Accelerometers – 3-Axis Digital Compass IC

HMC5983
Table 17: Status Register Bit Designations
Location Name
SR7 to
SR5
0
SR4
DOW
Description
These bits are reserved.
Data Over Written. Set when the measurement data are
not read before the subsequent data measurements are
posted to the output registers. This happens when master
device skips reading one or more data samples. Bit is
cleared at the beginning of a data read.
DR3 to
DR2
N/A
SR1
LOCK
SR0
RDY
Reserved.
Data output register lock. This bit is set when:
1.some but not all of of the six data output registers have
been read,
2. Mode register has been read.
When this bit is set, the six data output registers are locked
and any new data will not be placed in these register until
one of these conditions are met:
1.all six bytes have been read and the next measurement
starts,
2. The mode register is written,
3. The measurement configuration (CRA) is written,
4. Power is reset.
Ready Bit. Set when data is written to all six data registers.
Cleared when device initiates a write to the data output
registers and after one or more of the data output registers
are written to. When RDY bit is clear it shall remain cleared
for >200 μs. DRDY pin can be used as an alternative to
the status register for monitoring the device for
measurement data.
Identification Register A
The identification register A is used to identify the device. IRA0 through IRA7 indicate bit locations, with IRA denoting the
bits that are in the identification register A. IRA7 denotes the first bit of the data stream. The number in parenthesis
indicates the default value of that bit.
The identification value for this device is stored in this register. This is a read-only register.
Register values. ASCII value H
Table 18: Identification Register A Default Values
IRA7 IRA6
0
1
IRA5
0
IRA4
0
IRA3
1
IRA2
0
IRA1
0
IRA0
0
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