HT66F4360 Datasheet, PDF (81/263 Pages) Holtek Semiconductor Inc – Smart Card Reader Flash MCU

HT66F4360/HT66F4370/HT66F4390
Smart Card Reader Flash MCU
• RSTFC Register
Bit
Name
R/W
POR
Bit 7~4
Bit 3
Bit 2
Bit 1
Bit 0
7
6
5
4
3
2
1
0
—
—
—
—
RSTF LVRF
LRF
WRF
—
—
—
—
R/W
R/W
R/W
R/W
—
—
—
—
0
x
0
0
“x”: unknown
Unimplemented, read as “0”
RSTF: Reset control register software reset flag
Described elsewhere.
LVRF: LVR function reset flag
0: Not occurred
1: Occurred
This bit is set to 1 when a specific low voltage reset condition occurs. Note that this bit
can only be cleared to 0 by the application program.
LRF: LVR control register software reset flag
0: Not occurred
1: Occurred
This bit is set to 1 by the LVRC control register contains any undefined LVR voltage
register values. This in effect acts like a software-reset function. Note that this bit can
only be cleared to 0 by the application program.
WRF: WDT control register software reset flag
Described elsewhere.
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as the hardware Low Voltage
Reset except that the Watchdog time-out flag TO will be set to “1”.
WDT Time-out
Internal Reset
tRSTD + tSST
Note: tRSTD is power-on delay with typical time = 16.7 ms
WDT Time-out Reset during NORMAL Operation Timing Chart
Watchdog Time-out Reset during SLEEP or IDLE Mode
The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds
of reset. Most of the conditions remain unchanged except that the Program Counter and the Stack
Pointer will be cleared to “0” and the TO flag will be set to “1”. Refer to the A.C. Characteristics for
tSST details.
WDT Time-out
tSST
Internal Reset
WDT Time-out Reset during SLEEP or IDLE Mode Timing Chart
Rev. 1.30
81
December 15, 2016