HT66F4360 Datasheet, PDF (208/263 Pages) Holtek Semiconductor Inc – Smart Card Reader Flash MCU

HT66F4360/HT66F4370/HT66F4390
Smart Card Reader Flash MCU
Bit 2
Bit 1
Bit 0
WTEN: Waiting Time Counter (WTC) counting control
0: WTC stops counting
1: WTC starts to count
This bit is set and cleared by application program to enable the WTC counting
function. When the WTEN bit is cleared to 0, a write access to the CWT2 register will
load the value held in the CWT2~CWT0 registers into the WTC. If it is set to 1, the
WTC is enabled and automatically reloaded with the value in CWT2~CWT0 at each
start bit occurrence.
CREP: Character repetition enable control at a parity error condition
0: No retry on parity error
1: Automatically retry on parity error
The CREP bit is set and cleared by application program. When the CREP bit is cleared
to 0, both the RXCF and PARF flags will be set on parity error in reception mode after
the data is received while the PARF is set but the TXCF is cleared in the transmission
mode. If the CREP bit is set to 1, the character retry will automatically be activated on
parity error for 4 or 5 times depending upon the RETRY45 bit in the ISOC register.
In the transmission mode the character will be re-transmitted if the transmitted data
is refused and then the parity error flag PARF will be set at the end of the 4^th or 5^th
transmission but the TXCF bit will not be set. In the reception mode if the received
data has a parity error, the receiver will inform the transmitter for 4 or 5 times and then
the PARF and RXCF flags will both be set at the end of the 4^th or 5^th reception.
CONV: Data direction convention
0: LSB is transferred first – State “High” encodes value “1” and LSB is transferred first
0: MSB is transferred first – State “Low” encodes value “1” and MSB is transferred first
This bit is set and cleared by application program to select if the data is LSB
transferred first or MSB transferred first. When the data direction is the same as the
direction specified by the external Smart Card, the RXCF bit will be set to 1 without a
parity error. Otherwise, both the RXCF and PARF bits will be set to 1 after the data is
received.
CSR Register
Bit
Name
R/W
POR
7
TXBEF
R
1
6
CIRF
R
0
5
IOVF
R
0
4
VCOK
R
0
3
WTF
R
0
2
TXCF
R/W
0
1
RXCF
R
0
0
PARF
R/W
0
Bit 7
Bit 6
Bit 5
TXBEF: Transmit buffer empty request flag
0: Transmit buffer is not empty
1: Transmit buffer is empty
This bit is used to indicate whether the transmit buffer is empty or not and is set or
cleared by hardware automatically.
CIRF: Card presence request flag
0: No card is present
1: A card is present
This bit is used to indicate whether the card is present or not and is set or cleared by
hardware automatically. The CIRF bit will synchronously trigger the SCIRF bit in the
MCU interrupt controller.
IOVF: Card current overload request flag
0: Card current does not overload
1: Card current overloads
This bit is used to indicate whether the card current overloads or not and is set or
cleared by hardware automatically.
Rev. 1.30
208
December 15, 2016