BS87B12A-3 Datasheet, PDF (162/224 Pages) Holtek Semiconductor Inc – Touch A/D Flash MCU with OCVP

BS87B12A-3/BS87C16A-3/BS87D20A-3
Touch A/D Flash MCU with OCVP
Note that the USR register flags are read only and cannot be cleared or set by the application
program, neither will they be cleared when the program jumps to the corresponding interrupt
servicing routine, as is the case for some of the other interrupts. The flags will be cleared
automatically when certain actions are taken by the UART, the details of which are given in the
UART register section. The overall UART interrupt can be disabled or enabled by the related
interrupt enable control bits in the interrupt control registers of the microcontroller to decide whether
the interrupt requested by the UART module is masked out or allowed.
USR Register
Transmitter Empty Flag
TXIF
UCR2 Register
TEIE ⁰
1
Transmitter Idle Flag
TIDLE
Receiver Overrun Flag
OERR
Receiver Data Available
RXIF
RX Pin
Wake-up
WAKE 0
1
OR
ADDEN ⁰
1
TIIE ⁰
1
RIE ⁰
1
UART Interrupt
Request Flag
URF
0
1
TXR_RXR.7 if BNO=0
RX8 if BNO=1
UCR2 Register
UART Interrupt Structure
URE ⁰
1
EMI ⁰
1
Interrupt signal
to MCU
Address Detect Mode
Setting the Address Detect function enable control bit, ADDEN, in the UCR2 register, enables this
special function. If this bit is set to 1, then an additional qualifier will be placed on the generation
of a Receiver Data Available interrupt, which is requested by the RXIF flag. If the ADDEN bit
is equal to 1, then when the data is available, an interrupt will only be generated, if the highest
received bit has a high value. Note that the related interrupt enable control bit and the EMI bit of the
microcontroller must also be enabled for correct interrupt generation. The highest address bit is the
9^th bit if the bit BNO=1 or the 8^th bit if the bit BNO=0. If the highest bit is high, then the received
word will be defined as an address rather than data. A Data Available interrupt will be generated
every time the last bit of the received word is set. If the ADDEN bit is equal to 0, then a Receive
Data Available interrupt will be generated each time the RXIF flag is set, irrespective of the data last
bit status. The address detection and parity functions are mutually exclusive functions. Therefore, if
the address detect function is enabled, then to ensure correct operation, the parity function should be
disabled by resetting the parity function enable bit PREN to zero.
ADDEN
0
Bit 9 if BNO=1
Bit 8 if BNO=0
0
1
UART Interrupt
Generated
√
√
0
×
1
1
√
ADDEN Bit Function
Rev. 1.20
162
December 05, 2016