BS87B12A-3 Datasheet, PDF (145/224 Pages) Holtek Semiconductor Inc – Touch A/D Flash MCU with OCVP

BS87B12A-3/BS87C16A-3/BS87D20A-3
Touch A/D Flash MCU with OCVP
Start
Set SIM[2:0]=110
Set SIMEN
Write Slave
Address to SIMA
Clear SIMEN
Poll SIMF to decide when
to go to I²C Bus ISR
I²C Bus
Interrupt=?
Set SIME
Wait for Interrupt
Goto Main
Program
Goto Main
Program
I²C Bus Inisialisation Flow Chart
I²C Bus Start Signal
The START signal can only be generated by the master device connected to the I²C bus and not by
the slave device. This START signal will be detected by all devices connected to the I²C bus. When
detected, this indicates that the I²C bus is busy and therefore the HBB bit will be set. A START
condition occurs when a high to low transition on the SDA line takes place when the SCL line
remains high.
I²C Slave Address
The transmission of a START signal by the master will be detected by all devices on the I²C bus.
To determine which slave device the master wishes to communicate with, the address of the slave
device will be sent out immediately following the START signal. All slave devices, after receiving
this 7-bit address data, will compare it with their own 7-bit slave address. If the address sent out by
the master matches the internal address of the microcontroller slave device, then an internal I²C bus
interrupt signal will be generated. The next bit following the address, which is the 8^th bit, defines the
read/write status and will be saved to the SRW bit of the SIMC1 register. The slave device will then
transmit an acknowledge bit, which is a low level, as the 9^th bit. The slave device will also set the
status flag HAAS when the addresses match.
As an I²C bus interrupt can come from three sources, when the program enters the interrupt
subroutine, the HAAS and SIMTOF bits should be examined to see whether the interrupt source has
come from a matching slave address, the completion of a data byte transfer or the I²C bus time-out
occurrence. When a slave address is matched, the devices must be placed in either the transmit mode
and then write data to the SIMD register, or in the receive mode where it must implement a dummy
read from the SIMD register to release the SCL line.
I²C Bus Read/Write Signal
The SRW bit in the SIMC1 register defines whether the slave device wishes to read data from the
I²C bus or write data to the I²C bus. The slave device should examine this bit to determine if it is to
be a transmitter or a receiver. If the SRW flag is "1" then this indicates that the master device wishes
to read data from the I²C bus, therefore the slave device must be setup to send data to the I²C bus as
a transmitter. If the SRW flag is "0" then this indicates that the master wishes to send data to the I²C
bus, therefore the slave device must be setup to read data from the I²C bus as a receiver.
Rev. 1.20
145
December 05, 2016