HT67F60A Datasheet, PDF (111/242 Pages) Holtek Semiconductor Inc – TinyPowerTM A/D Flash MCU with LCD & EEPROM

HT67F60A/HT67F70A
TinyPower^TM A/D Flash MCU with LCD & EEPROM
STMnC1 Register
Bit
Name
R/W
POR
7
STnM1
R/W
0
6
STnM0
R/W
0
5
STnIO1
R/W
0
4
STnIO0
R/W
0
3
STnOC
R/W
0
2
1
0
STnPOL STnDPX CTnCCLR
R/W
R/W
R/W
0
0
0
Bit 7~6
Bit 5~4
STnM1~STnM0: Select STMn Operating Mode
00: Compare Match Output Mode
01: Capture Input Mode
10: PWM Mode or Single Pulse Output Mode
11: Timer/Counter Mode
These bits setup the required operating mode for the STMn. To ensure reliable
operation the STMn should be switched off before any changes are made to the
STnM1 and STnM0 bits. In the Timer/Counter Mode, the STMn output pin control
will be disabled.
STnIO1~STnIO0: Select STMn external pin (STPn or STPnI) function
Compare Match Output Mode
00: No change
01: Output low
10: Output high
11: Toggle output
PWM Output Mode/Single Pulse Output Mode
00: PWM output inactive state
01: PWM output active state
10: PWM output
11: Single Pulse Output
Capture Input Mode
00: Input capture at rising edge of STPnI
01: Input capture at falling edge of STPnI
10: Input capture at rising/falling edge of STPnI
11: Input capture disabled
Timer/Counter Mode
Unused
These two bits are used to determine how the STMn output pin changes state when a
certain condition is reached. The function that these bits select depends upon in which
mode the STMn is running.
In the Compare Match Output Mode, the STnIO1 and STnIO0 bits determine how the
STMn output pin changes state when a compare match occurs from the Comparator A.
The STMn output pin can be setup to switch high, switch low or to toggle its present
state when a compare match occurs from the Comparator A. When the bits are both
zero, then no change will take place on the output. The initial value of the STMn
output pin should be setup using the STnOC bit in the STMnC1 register. Note that
the output level requested by the STnIO1 and STnIO0 bits must be different from the
initial value setup using the STnOC bit otherwise no change will occur on the STMn
output pin when a compare match occurs. After the STMn output pin changes state,
it can be reset to its initial level by changing the level of the STnON bit from low to
high.
In the PWM Mode, the STnIO1 and STnIO0 bits determine how the STMn output
pin changes state when a certain compare match condition occurs. The PWM output
function is modified by changing these two bits. It is necessary to only change the
values of the STnIO1 and STnIO0 bits only after the STMn has been switched off.
Unpredictable PWM outputs will occur if the STnIO1 and STnIO0 bits are changed
when the STMn is running.
Rev. 1.10
111
December 01, 2016