HD74CDCF2509B Datasheet, PDF (8/11 Pages) Hitachi Semiconductor – 140 MHz, 0 to 85°C Operation 3.3-V Phase-lock Loop Clock Driver

HD74CDCF2509B
Test Circuit
From output
under test
*1
C_L= 25 pF
500 Ω
Note:
1. C_L includes probe and jig capacitance.
Waveforms – 1
3V
Input
50% V_CC
50% V_CC
0V
Output
(=FBOUT)
2V
50% V_CC
0.4 V
t_TLH
2V
V_OH
0.4 V
V_OL
t_THL
Notes:
1. All input pulses are supplied by generators having the following characteristics: PRR ≤ 100
MHz, Z_O = 50 Ω, t_r = 1.2 ns, t_f = 1.2 ns.
2. The outputs are measured one at a time with one transition per measurement.
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