HD404369 Datasheet, PDF (76/115 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer

HD404369 Series
When bits 0 and 1 (PMRA0, PMRA1) of port mode register A (PMRA: $004) are 00 in transmit clock
wait state and if the transmit clock is input (17), the serial interface enters continuous clock output state.
If the serial mode register (SMR: $005) is written to in continuous clock output mode (18), STS wait
state is entered.
Output Level Control in Idle States: In idle states, that is, STS wait state and transmit clock wait state,
the output level of the SO pin can be controlled by setting bit 1 (PMRC1) of port mode register C (PMRC:
$025) to 0 or 1. The output level control example is shown in figure 60. Note that the output level cannot be
controlled in transfer state.
Transmit Clock Error Detection (In External Clock Mode): The serial interface will malfunction if a
spurious pulse caused by external noise conflicts with a normal transmit clock during transfer. A transmit
clock error of this type can be detected as shown in figure 61.
Table 27 Serial Interface Operating Modes
SMR
Bit 3
1
PMRA
Bit 1
0
1
Bit 0
0
1
0
1
Operating Mode
Continuous clock output mode
Transmit mode
Receive mode
Transmit/receive mode
Table 28 Serial Transmit Clock (Prescaler Output)
PMRC
Bit 0
0
SMR
Bit 2
0
1
1
0
1
Bit 1
0
1
0
0
1
0
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
Prescaler Division Ratio
÷ 2048
÷ 512
÷ 128
÷ 32
÷8
÷2
÷ 4096
÷ 1024
÷ 256
÷ 64
÷ 16
÷4
Transmit Clock Frequency
4096t_cyc
1024t_cyc
256t_cyc
64t_cyc
16t_cyc
4t _cyc
8192t_cyc
2048t_cyc
512t_cyc
128t_cyc
32t_cyc
8t _cyc
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