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HD404356 Datasheet, PDF (76/100 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer | |||
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HD404358 Series
A/D data register (lower digit) (ADRL: $017)
Bit
Initial value
Read/Write
Bit name
3
0
R
ADRL3
2
0
R
ADRL2
1
0
R
ADRL1
0
0
R
ADRL0
Figure 69 A/D Data Register Lower Digit (ADRL)
A/D data register (upper digit) (ADRU: $018)
Bit
Initial value
Read/Write
Bit name
3
1
R
ADRU3
2
0
R
ADRU2
1
0
R
ADRU1
0
0
R
ADRU0
Figure 70 A/D Data Register Upper Digit (ADRU)
Notes on Usage
⢠Use the SEM or SEMD instruction for writing to the A/D start flag (ADSF)
⢠Do not write to the A/D start flag during A/D conversion
⢠Data in the A/D data register during A/D conversion is undefined
⢠Since the operation of the A/D converter is based on the clock from the system oscillator, the A/D
converter does not operate in stop mode. In addition, to save power while in these modes, all current
flowing through the converterâs resistance ladder is cut off.
⢠If the power supply for the A/D converter is to be different from VCC, connect a 0.1-µF bypass capacitor
between the AVCC and AVSS pins. (However, this is not necessary when the AVCC pin is directly
connected to the VCC pin.)
⢠The contents of the A/D data register are not guaranteed during A/D conversion. To ensure that the A/D
converter oparates stably, do not execute port output instructions during A/D convention.
⢠The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected
as active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to VCC. When using a
shared R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by
MIS3 and PDR is set to 1, a pin selected by A/D mode register 1 or 2 (AMR1 or AMR2) as an analog
pin will remain pulled up (figure 71).
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