HD404356 Datasheet, PDF (37/100 Pages) Hitachi Semiconductor – 4-bit HMCS400-Series microcomputer

HD404358 Series
D Port (D₀–D₈): Consist of 9 input/output pins addressed by one bit.
Pins D₀–D₈ are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.
Output data is stored in the port data register (PDR) for each pin. All pins D₀–D₈ are tested by the TD and
TDD instructions.
The on/off statuses of the output buffers are controlled by D-port data control registers (DCD0–DCD2: $02C–
$02E) that are mapped to memory addresses (figure 21).
Pins D0–D2, D4 are multiplexed with peripheral function pins INT0, INT1, EVNB, and STOPC,
respectively. The peripheral function modes of these pins are selected by bits 0–3 (PMRB0–PMRB3) of
port mode register B (PMRB: $024) (figure 22).
Pin D₃ is multiplexed with peripheral function pin BUZZ. The peripheral function mode of this pin is
selected by bit 3 (PMRA3) of port mode register A (PMRA: $004) (figure 23).
R Ports (R0₀–R4₃, R8): 24 input/output pins addressed in 4-bit units. Data is input to these ports by the
LAR and LBR instructions, and output from them by the LRA and LRB instructions. Output data is stored
in the port data register (PDR) for each pin. The on/off statuses of the output buffers of the R ports are
controlled by R-port data control registers (DCR0–DCR4: $030–$034, DCR8: $038) that are mapped to
memory addresses (figure 21).
Pin R0₀ is multiplexed with peripheral function pin SCK. The peripheral function mode of this pin is
selected by bit 3 (SMR3) of serial mode register (SMR: $005) (figure 24).
Pins R0₁–R0₃ are multiplexed with peripheral pins SI, SO and TOC, respectively. The peripheral function
modes of these pins are selected by bits 0–2 (PMRA0–PMRA2) of port mode register A (PMRA: $004), as
shown in figures 23.
Port R3 is multiplexed with peripheral function pins AN₀–AN₃, respectively. The peripheral function
modes of these pins can be selected by individual pins, by setting A/D mode register 1 (AMR1: $019)
(figure 25).
Ports R4 is multiplexed with peripheral function pins AN₄–AN₇, respectively. The peripheral function
modes of these pins can be selected in 4-pin units by setting bit 1 (AMR21) of A/D mode register 2
(AMR2: $01A) (figure 26).
Pull-Up MOS Transistor Control: A program-controlled pull-up MOS transistor is provided for each
input/output pin. The on/off status of all these transistors is controlled by bit 3 (MIS3) of the miscellaneous
register (MIS: $00C), and the on/off status of an individual transistor can also be controlled by the port data
register (PDR) of the corresponding pin—enabling on/off control of that pin alone (table 21 and figure 27).
The on/off status of each transistor and the peripheral function mode of each pin can be set independently.
How to Deal with Unused I/O Pins: I/O pins that are not needed by the user system (floating) must be
connected to V_CC to prevent LSI malfunctions due to noise. These pins must either be pulled up to V_CC by
their pull-up MOS transistors or by resistors of about 100 kΩ.
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