HD66100F Datasheet, PDF (7/17 Pages) Hitachi Semiconductor – LCD Driver with 80-Channel Outputs

HD66100F
Block Functions
LCD Drive Circuits
Select one of four levels of voltage V1, V2, V3, and V4 for driving a LCD and transfer it to the output
terminals according to the combination of M and the data in the latch circuit.
Latch Circuit
Latches the data input from the bidirectional shift register at the fall of CL1 and transfer its outputs to the
LCD drive circuits.
Bidirectional Shift Register
Shifts the serial data at the fall of CL2 and transfers the output of each bit of the register to the latch
circuit. When SHL = GND, the data input from DI shifts from bit 1 to bit 80 in order of entry. On the
other hand, when SHL = V_CC, the data shifts from bit 80 to bit-1. In both cases, the data of the last bit of
the register is latched to be output from DO at the rise of CL2.
SHL = GND
Y1 Y2
LCD drive outputs
Y79 Y80
CL1
CL2
DI
DO
SHL = V_CC
12
Latch circuit
79 80
12
Shift register
79 80
Y1 Y2
LCD drive outputs
Y79 Y80
CL1
12
Latch circuit
79 80
CL2
12
Shift register
79 80
DI
DO
Figure 3 Relation between SHL and the Shift Direction
115