2SK1298 Datasheet, PDF (7/9 Pages) Hitachi Semiconductor – Silicon N-Channel MOS FET

Reverse Drain Current vs.
Source to Drain Voltage
100
Pulse Test
80
60
10 V 5 V
40
20
V_GS = 0, – 5 V
0
0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage V_SD (V)
2SK1298
Normalized Transient Thermal Impedance vs. Pulse Width
3
1.0 ^{D = 1}
0.5
0.3 _0.2
0.1
0.1
0.05
0.03
0.01
0.02
0.01
1
Shot
Pulse
10 µ
100 µ
T_C = 25°C
1m
10 m
Pulse Width PW (s)
θch–c (t) = γs (t) · θch–c
θch–c = 2.50°C/W, T_C = 25°C
P_DM
PW
T
D = ^PTW
100 m
1
10
Switching Time Test Circuit
Vin Monitor
D.U.T
Vout Monitor
R_L
Vin = 10 V
50 Ω
V_DD =^.. 30 V
Wavewforms
90 %
Vin 10 %
Vout 10 %
10 %
td _(on)
90 %
90 %
tr
td _(off)
tf
7