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HD74CDC857 Datasheet, PDF (6/12 Pages) Hitachi Semiconductor – 3.3/2.5-V Phase-lock Loop Clock Driver
HD74CDC857
Logic Diagram
G
CLK
CLK
PLL
FBIN
FBIN
AVCC
Note: All inputs and outputs are associated with VDDQ = 2.5 V.
Y0
Y0
Y1
Y1
Y2
Y2
Y3
Y3
Y4
Y4
Y5
Y5
Y6
Y6
Y7
Y7
Y8
Y8
Y9
Y9
FBOUT
FBOUT
6