CD22101 Datasheet, PDF (6/13 Pages) Harris Corporation – CMOS 4 x 4 x 2 Crosspoint Switch with Control Memory

CD22101, CD22102
Schematic Diagram
(NOTE) STROBE
13
(NOTE) DATA IN
14
24
V_DD
23
A
(NOTE)
1
B
(NOTE)
2
C
(NOTE)
11
D
(NOTE)
12
V_SS
TO X1’ Y1’
A
B
C
A
D
DQ
0
1
ø
2
3
ø
LATCH
A
TO 15 OTHER
TO 15 OTHER
4
NANDS
LATCHS
5
6
7
B
CD22101
K_A (SET) K_B (RESET)
B ^(NOTE)
14
C
(NOTE)
13
A
B
C
D
8
DQ
9
ø
10
11
ø
R
12
C
13
TO 15 OTHER
NANDS
14
15
D
D
TO 15 OTHER
LATCHES
CD22102
21
Y1 ^(Y41’)
TG
TG
TG
TG
20
Y2
(Y52’)
TG
TG
TG
TG
16
Y3 ^(Y93’)
TG
TG
TG
TG
17 _(Y84’)
Y4
TG
TG
TG
TG
15
X1
(
10
X1’
)
22
X2
(
3
X2’
)
18
X3
(
7
X3’
)
19
X4
(
6
X4’
)
DETAIL OF TRANSMISSION GATES
V_DD
IN
V_DD
DETAIL OF LATCHES
V_DD
ø
NOTE: INPUTS PROTECTED
BY COS/MOS
PROTECTION
NETWORK
D
V_SS
p
n
ø
ø
p
n
Q_ø
Q
V_SS
OUT
DECODER TRUTH TABLE
ADDRESS
ADDRESS
A
B
C
D
SELECT
A
B
C
D
SELECT
0
0
0
0
X1Y1 and X1’Y1’
0
0
0
1
X1Y3 and X1’Y3’
1
0
0
0
X2Y1 and X2’Y1’
1
0
0
1
X2Y3 and X2’Y3’
0
1
0
0
X3Y1 and X3’Y1’
0
1
0
1
X3Y3 and X3’Y3’
1
1
0
0
X4Y1 and X4’Y1’
1
1
0
1
X4Y3 and X4’Y3’
0
0
1
0
X1Y2 and X1’Y2’
0
0
1
1
X1Y4 and X1’Y4’
1
0
1
0
X2Y2 and X2’Y2’
1
0
1
1
X2Y4 and X2’Y4’
0
1
1
0
X3Y2 and X3’Y2’
0
1
1
1
X3Y4 and X3’Y4’
1
1
1
0
X4Y2 and X4’Y2’
1
1
1
1
X4Y4 and X4’Y4’
4-198