CD4051B Datasheet, PDF (1/15 Pages) Texas Instruments – CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion

Semiconductor
CD4051B, CD4052B, CD4053B
August 1998
File Number 902.2
CMOS Analog Multiplexers/Demultiplexers
with Logic Level Conversion
The CD4051B, CD4052B, and CD4053B analog multiplexers
are digitally-controlled analog switches having low ON
impedance and very low OFF leakage current. Control of
analog signals up to 20V_P-P can be achieved by digital
signal amplitudes of 4.5V to 20V (if V_DD -V_SS = 3V, a
V_DD -V_EE of up to 13V can be controlled; for V_DD -V_DD
level differences above 13V, a V_DD -V_DD of at least 4.5V is
required). For example, if V_DD = +4.5V, V_DD = 0V, and
V_DD = -13.5V, analog signals from -13.5V to +4.5V can be
controlled by digital inputs of 0V to 5V. These multiplexer
circuits dissipate extremely low quiescent power over the
full V_DD -V_DD and V_DD -V_DD supply-voltage ranges,
independent of the logic state of the control signals. When
a logic “1” is present at the inhibit input terminal, all
channels are off.
The CD4051B is a single 8-Channel multiplexer having three
binary control inputs, A, B, and C, and an inhibit input. The
three binary signals select 1 of 8 channels to be turned on,
and connect one of the 8 inputs to the output.
The CD4052B is a differential 4-Channel multiplexer having
two binary control inputs, A and B, and an inhibit input. The
two binary input signals select 1 of 4 pairs of channels to be
turned on and connect the analog inputs to the outputs.
The CD4053B is a triple 2-Channel multiplexer having three
separate digital control inputs, A, B, and C, and an inhibit
input. Each control input selects one of a pair of channels
which are connected in a single-pole, double-throw
configuration.
When these devices are used as demultiplexers, the
“CHANNEL IN/OUT” terminals are the outputs and the
“COMMON OUT/IN” terminals are the inputs.
Ordering Information
PART NUMBER
TEMP.
PKG.
RANGE (^oC) PACKAGE NO.
CD4051BF, CD4052BF,
CD4053BF
-55 to 125 16 Ld CERDIP F16.3
CD4051BE, CD4052BE,
CD4053BE
-55 to 125 16 Ld PDIP
E16.3
CD4051BM, CD4052BM, -55 to 125 16 Ld SOIC M16.15
CD4053BM
Features
• Wide Range of Digital and Analog Signal Levels
- Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V
- Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20V_P-P
• Low ON Resistance, 125Ω (Typ) Over 15V_P-P Signal Input
Range for V_DD-V_EE = 18V
• High OFF Resistance, Channel Leakage of ±100pA (Typ)
at V_DD-V_EE = 18V
• Logic-Level Conversion for Digital Addressing Signals of
3V to 20V (V_DD-V_SS = 3V to 20V) to Switch Analog
Signals to 20V_P-P (V_DD-V_EE = 20V)
• Matched Switch Characteristics, r_ON = 5Ω (Typ) for
V_DD-V_EE = 15V
• Very Low Quiescent Power Dissipation Under All Digital-
Control Input and Supply Conditions, 0.2µW (Typ) at
V_DD-V_SS = V_DD-V_EE = 10V
• Binary Address Decoding on Chip
• 5V, 10V and 15V Parametric Ratings
• 10% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package
Temperature Range, 100nA at 18V and 25^oC
• Break-Before-Make Switching Eliminates Channel
Overlap
Applications
• Analog and Digital Multiplexing and Demultiplexing
• A/D and D/A Conversion
• Signal Gating
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © Harris Corporation 1998