HMN1M8DV Datasheet, PDF (8/9 Pages) Hanbit Electronics Co.,Ltd – Non-Volatile SRAM MODULE 8Mbit (1024k x 8bit) 36Pin-DIP, 3.3V

HANBit
- WRITE CYCLE NO.2 (/CE-Controlled)^*1,2,3,4,5
HMN1M8DV
Address
tAW
tAS
tCW
tWR2
/CE
/WE
DIN
DOUT
tWP
tWZ
Data Undefined
tDW
tDH2
Data-in
High-Z
NOTE:
1. /CE or /WE must be high during address transition.
2. Because I/O may be active (/OE low) during this period, data input signals of opposite
polarity to the outputs must not be applied.
3. If /OE is high, the I/O pins remain in a state of high impedance.
4. Either t_WR1 or t_WR2 must be met.
5. Either t_DH1 or t_DH2 must be met.
POWER-DOWN/POWER-UP TIMING
VCC
4.75
tPF
VPFD
4.25
VSO
VPFD
VSO
tFS
tWPT
tDR
tPU
tCER
/CE
URL:www.hbe.co.kr
Rev.0.0 (FEBRUARY/ 2002)
8
HANBit Electronics Co.,Ltd