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S11865-64_15 Datasheet, PDF (11/14 Pages) Hamamatsu Corporation – Photodiode arrays combined with signal processing IC
Photodiode arrays with amplifiers
S11865-64/-128/-256, S11866-64-02/-128-02
S11865-256
Signals of channels 1 through 126 are output from CMOS1, while signals of channels 129 through 256 are output from CMOS2. The fol-
lowing two readout methods are available.
(1) Serial readout method
CMOS1 and CMOS2 are connected in serial and the signals of channels 1 through 256 are sequentially read out from one output line.
Set CMOS1 as in “A” in the table below, and set CMOS2 as in “B”. CMOS1 and CMOS2 should be connected to the same CLK and RESET
lines, and their video output terminals to one line.
(2) Parallel readout method
128 channel signals are output in parallel respectively from the output lines of CMOS1 and CMOS2. Set both CMOS1 and CMOS2 as in “A”
in the table below.
Connection examples
· Serial readout method
RESET
CLK
Vdd
GND
Vref
Vgain
Trig
OR Logic IC
74HC32
EOS
Video
CMOS1
1 Vpd
2 RESET (1)
3 CLK (1)
4 Trig (1)
5 EXTSP (1)
6 Vms (1)
7 Vdd
8 GND
9 EOS (1)
10 Video (1)
11 Vref
12 Vgain
13 Vpd
CMOS2
14 Vpd
15 RESET (2)
16 CLK (2)
17 Trig (2)
18 EXTSP (2)
19 Vms (2)
20 Vdd
21 GND
22 EOS (2)
23 Video (2)
24 Vref
25 Vgain
26 Vpd
KMPDC0222EA
· Parallel readout method
RESET
CLK
Trig (1)
Vdd
GND
EOS (1)
Video (1)
Vref
Vgain
Trig (2)
EOS (2)
Video (2)
CMOS1
1 Vpd
2 RESET (1)
3 CLK (1)
4 Trig (1)
5 EXTSP (1)
6 Vms (1)
7 Vdd
8 GND
9 EOS (1)
10 Video (1)
11 Vref
12 Vgain
13 Vpd
CMOS2
14 Vpd
15 RESET (2)
16 CLK (2)
17 Trig (2)
18 EXTSP (2)
19 Vms (2)
20 Vdd
21 GND
22 EOS (2)
23 Video (2)
24 Vref
25 Vgain
26 Vpd
KMPDC0223EB
Setting
A
B
Vms
Vdd
GND
EXTSP
Vdd
Preceding sensor EOS should be input
11