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GS815018AB Datasheet, PDF (9/25 Pages) GSI Technology – 1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
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GS815018/36AB-357/333/300/250
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 1.8 V)
Parameter
Symbol
Input Capacitance
Output Capacitance
Output Capacitance (Clock)
Note:
This parameter is sample tested.
CIN
COUT
CIN(CK)
Test conditions
VIN = 0 V
VOUT = 0 V
VIN = 0 V
Max. Unit
4
pF
5
pF
5
pF
AC Test Conditions
Parameter
Input high level
Input low level
Input rise/fall time (10% to 90%)
Input reference level
Clock input reference level
Output reference level
Clock (VDIF)
Clock (VCM)
VDDQ
RQ
AC Test Load Diagram
Device Under Test
VDDQ = 1.5 V
DQ
25Ω
ZQ
RQ = 250Ω
50Ω
50Ω
5pF
VDDQ/2
50Ω
50Ω
5pF
Conditions
1.25 V
0.25 V
0.5 ns/0.5 ns
VDDQ/2
Differential cross point
VDDQ/2
0.75 V
0.75 V
1.5 V
250Ω
VDDQ/2
VDDQ/2
Rev: 1.05 10/2005
9/25
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology