GS76024AB Datasheet, PDF (8/12 Pages) GSI Technology – 256K x 24 6Mb Asynchronous SRAM

Address
OE
CE
WE
Data In
Data Out
Address
OE
CE
WE
Data In
Data Out
Write Cycle 1: WE control
t_WC
t_AW
t_WR
t_CW
t_AS
t_WP
t_WHZ
t_DW
t_DH
Data valid
t_WLZ
High impedance
Write Cycle 2: CE control
t_WC
t_AW
t_WR1
t_AS
t_CW
t_WP
t_DW
t_DH
Data valid
High impedance
GS76024AB
Rev: 1.02 12/2005
8/12
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology