GS74104ATP Datasheet, PDF (8/11 Pages) GSI Technology – 1M x 4 4Mb Asynchronous SRAM

Address
OE
CE
WE
Data In
Data Out
D
1
e
y
B
B1
Write Cycle 2: CE control
tWC
tAW
tWR1
tAS
tCW
tWP
tDW
tDH
DATA VALID
GS74104ATP/J
HIGH IMPEDANCE
32-Pin SOJ, 400 mil
L
c
A
Detail A ^Q
Dimension in inch
Dimension in mm
Symbol _{min nom max min nom max}
A
— — 0.146 — — 3.70
A1 0.026 — — 0.66 — —
A2 0.105 0.110 0.115 2.67 2.80 2.92
B 0.013 0.017 0.021 0.33 0.43 0.53
B1 0.024 0.028 0.032 0.61 0.71 0.81
c 0.006 0.008 0.012 0.15 0.20 0.30
D 0.820 0.824 0.829 20.83 20.93 21.06
E 0.395 0.400 0.405 10.04 10.16 10.28
e
— 0.05 — — 1.27 —
HE 0.430 0.435 0.440 10.93 11.05 11.17
GE 0.354 0.366 0.378 9.00 9.30 9.60
L 0.082 — — 2.08 — —
y
— — 0.004 — — 0.10
Q
0^o
— ₁₀^o ₀^o
— ₁₀^o
Notes:
1. Dimension D& E do not include interlead flash.
2. Dimension B1 does not include dambar protrusion/intrusion.
3. Controlling dimension: inches
Rev: 1.06 6/2006
8/11
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, GSI Technology