GS74104ATP Datasheet, PDF (6/11 Pages) GSI Technology – 1M x 4 4Mb Asynchronous SRAM

Address
Data Out
Read Cycle 1: CE = OE = V_IL, WE = V_IH
tRC
tAA
tOH
Previous Data
Data valid
Address
CE
OE
Data Out
Read Cycle 2: WE = V_IH
tRC
tAA
tAC
tHZ
tLZ
tOE
tOLZ
High impedance
tOHZ
DATA VALID
GS74104ATP/J
Rev: 1.06 6/2006
6/11
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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