GS78116AB Datasheet, PDF (5/11 Pages) GSI Technology – 512K x 16 8Mb Asynchronous SRAM

AC Test Conditions
Parameter
Conditions
Input high level
Input low level
Input rise time
V_IH = 2.4 V
V_IL = 0.4 V
tr = 1 V/ns
Input fall time
tf = 1 V/ns
Input reference level
1.4 V
Output reference level
1.4 V
Output load
Fig. 1& 2
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted
3. Output load 2 for t_LZ, t_HZ, t_OLZ and t_OHZ.
GS78116AB
Output Load 1
DQ
50Ω 30pF¹
VT = 1.4 V
Output Load 2
3.3 V
DQ
589Ω
5pF^{1 434Ω}
AC Characteristics
Read Cycle
Parameter
Read cycle time
Address access time
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
-8
-10
-12
Symbol
Unit
Min Max Min Max Min Max
tRC
8
—
10
—
12
—
ns
tAA
—
8
—
10
—
12
ns
tAC
—
8
—
10
—
12
ns
tOE
—
3.5
—
4
—
5
ns
tOH
3
—
3
—
3
—
ns
tLZ^*
3
—
3
—
3
—
ns
tOLZ^*
0
—
0
—
0
—
ns
tHZ^*
—
4
—
5
—
6
ns
tOHZ^*
—
3.5
—
4
—
5
ns
Rev: 1.04 5/2006
5/11
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology