GS81314PD19GK-933I Datasheet, PDF (29/39 Pages) GSI Technology – Burst of 4 Single-Bank ECCRAM

GS81314PD19/37GK-933/800
AC Timing Specifications (variable with device speed grade)
Parameter
Symbol
–933
Min
Max
–800
Min
Max
Units Notes
Input Clock Timing
Clk Cycle Time
t_KHKH
1.07
6.0
1.25
6.0
ns
1
Input Setup & Hold Timing
Input Valid to Clk High
Clk High to Input Hold
t_IVKH
150
—
150
—
ps
2
t_KHIX
150
—
150
—
ps
Input Pulse Width
t_IPW
200
—
200
—
ps
3
MRW Valid to Clk High
Clk High to MRW Hold
t_RVKH
150
—
150
—
ps
4
t_KHRX
150
—
150
—
ps
Notes:
All parameters are measured from the mid-point of the object signal to the mid-point of the reference signal.
1. Parameters apply to CK, CK, KD, KD.
2. Parameters apply to SA, and are referenced to CK (and to CK during Loopback Mode).
Parameters apply to R, W, and are referenced to CK (and to CK during Loopback Mode).
Parameters apply to D, DINV, and are referenced to KD & KD.
Parameters apply to KD, KD, and are referenced to CK & CK during Loopback Mode.
3. Parameter specifies the input pulse width requirements for each individual address, control, and data input. Per-pin deskew must be per-
formed, to center the valid window of each individual input around the clock edge that latches it, in order for this parameter to be relevant
to the application. The parameter is not tested; it is guaranteed by design and verified through extensive corner-lot characterization.
4. Parameters apply to MRW, and are referenced to CK. Applicable when Register Write Mode is utilized synchronously.
Rev: 1.02 3/2016
29/39
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology