GS8321Z18 Datasheet, PDF (28/34 Pages) GSI Technology – 36Mb Pipelined and Flow Through Synchronous NBT SRAM

GS8321Z18/32/36E-250/225/200/166/150/133
JTAG Port Timing Diagram
TCK
TDI
TMS
TDO
Parallel SRAM input
tTKC
tTKH
tTH
tTS
tTH
tTS
tTKQ
tTH
tTS
tTKL
JTAG Port AC Electrical Characteristics
Parameter
Symbol Min Max Unit
TCK Cycle Time
tTKC
50
—
ns
TCK Low to TDO Valid
tTKQ
—
20
ns
TCK High Pulse Width
tTKH
20
—
ns
TCK Low Pulse Width
tTKL
20
—
ns
TDI & TMS Set Up Time
tTS
10
—
ns
TDI & TMS Hold Time
tTH
10
—
ns
Boundary Scan (BSDL Files)
For information regarding the Boundary Scan Chain, or to obtain BSDL files for this part, please contact our Applications
Engineering Department at: [e-mail].
Rev: 1.08 2/2011
28/34
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2003, GSI Technology