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GS8321Z18 Datasheet, PDF (16/34 Pages) GSI Technology – 36Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8321Z18/32/36E-250/225/200/166/150/133
Capacitance
(TA = 25oC, f = 1 MHZ, VDD = 2.5 V)
Parameter
Input Capacitance
Input/Output Capacitance
Note:
These parameters are sample tested.
Symbol
CIN
CI/O
Test conditions
VIN = 0 V
VOUT = 0 V
AC Test Conditions
Parameter
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.
3. Device is deselected as defined by the Truth Table.
Typ.
Max.
Unit
4
5
pF
6
7
pF
Conditions
VDD – 0.2 V
0.2 V
1 V/ns
VDD/2
VDDQ/2
Fig. 1
Output Load 1
DQ
50Ω
30pF*
VDDQ/2
* Distributed Test Jig Capacitance
Rev: 1.08 2/2011
16/34
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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