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GS8162Z18BB-V Datasheet, PDF (27/33 Pages) GSI Technology – 18Mb Pipelined and Flow Through Synchronous NBT SRAM
TCK
TDI
TMS
TDO
Parallel SRAM input
JTAG Port Timing Diagram
tTKC
tTKH
tTH
tTS
tTH
tTS
tTKQ
tTH
tTS
tTKL
Preliminary
GS8162ZxxB(B/D)-xxxV
JTAG Port AC Electrical Characteristics
Parameter
TCK Cycle Time
TCK Low to TDO Valid
TCK High Pulse Width
TCK Low Pulse Width
TDI & TMS Set Up Time
TDI & TMS Hold Time
Symbol
tTKC
tTKQ
tTKH
tTKL
tTS
tTH
Min Max Unit
50
—
ns
—
20
ns
20
—
ns
20
—
ns
10
—
ns
10
—
ns
Boundary Scan (BSDL Files)
For information regarding the Boundary Scan Chain, or to obtain BSDL files for this part, please contact our Applications
Engineering Department at: apps@gsitechnology.com.
Rev: 1.01a 6/2006
27/33
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2004, GSI Technology