GS816118BT Datasheet, PDF (20/35 Pages) GSI Technology – 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

GS816118B(T/D)/GS816132B(D)/GS816136B(T/D)
AC Electrical Characteristics
Parameter
Symbol
-250
-200
-150
Unit
Min
Max
Min
Max
Min
Max
Pipeline
Flow Through
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
Clock to Output in Low-Z
Setup time
Hold time
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
Clock to Output in Low-Z
Setup time
Hold time
tKC
4.0
—
5.0
—
6.7
—
ns
tKQ
—
2.5
—
3.0
—
3.8
ns
tKQX
1.5
—
1.5
—
1.5
—
ns
tLZ¹
1.5
—
1.5
—
1.5
—
ns
tS
1.2
—
1.4
—
1.5
—
ns
tH
0.2
—
0.4
—
0.5
—
ns
tKC
5.5
—
6.5
—
7.5
—
ns
tKQ
—
5.5
—
6.5
—
7.5
ns
tKQX
2.0
—
2.0
—
2.0
—
ns
tLZ¹
2.0
—
2.0
—
2.0
—
ns
tS
1.5
—
1.5
—
1.5
—
ns
tH
0.5
—
0.5
—
0.5
—
ns
Clock HIGH Time
tKH
1.3
—
1.3
—
1.5
—
ns
Clock LOW Time
tKL
1.5
—
1.5
—
1.7
—
ns
Clock to Output in
High-Z
tHZ¹
1.5
2.5
1.5
3.0
1.5
3.0
ns
G to Output Valid
tOE
—
2.5
—
3.0
—
3.8
ns
G to output in Low-Z
G to output in High-Z
ZZ setup time
ZZ hold time
tOLZ¹
tOHZ¹
tZZS²
tZZH²
0
—
0
—
0
—
ns
—
2.5
—
3.0
—
3.8
ns
5
—
5
—
5
—
ns
1
—
1
—
1
—
ns
ZZ recovery
tZZR
20
—
20
—
20
—
ns
Notes:
1. These parameters are sampled and are not 100% tested
2. ZZ is an asynchronous signal. However, In order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold times as
specified above.
Rev: 1.03 9/2005
20/35
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2004, GSI Technology