GS8162ZV72CC Datasheet, PDF(12/27 Page) GSI Technology – 18Mb Pipelined and Flow Through Synchronous NBT SRAM

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GS8162ZV72CC Datasheet, PDF (12/27 Pages) GSI Technology – 18Mb Pipelined and Flow Through Synchronous NBT SRAM

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Preliminary

GS8162ZV72CC-333/300/250/200/150

Logic Levels

Parameter

Symbol Min.

Typ.

Max.

Unit Notes

VDD Input High Voltage

VIH

0.6*VDD

VDD + 0.3

VDD Input Low Voltage

VIL

â0.3

0.3*VDD

VDDQ I/O Input High Voltage

VIHQ

0.6*VDD

VDDQ + 0.3

1,3

VDDQ I/O Input Low Voltage

VILQ

â0.3

0.3*VDD

1,3

Notes:

1. The part numbers of Industrial Temperature Range versions end the character âIâ. Unless otherwise noted, all performance specifica-

tions quoted are evaluated for worst case in the temperature range marked on the device.

2. Input Under/overshoot voltage must be â2 V > Vi < VDDn+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.

3. VIHQ (max) is voltage on VDDQ pins plus 0.3 V.

Undershoot Measurement and Timing

VIH

VSS

50%

VSS â 2.0 V

20% tKC

Capacitance

(TA = 25oC, f = 1 MHZ, VDD = 2.5 V)

Parameter

Symbol

Input Capacitance

CIN

Input/Output Capacitance

CI/O

Note:

These parameters are sample tested.

Overshoot Measurement and Timing

VDD + 2.0 V

50%

20% tKC

VDD

VIL

Test conditions

VIN = 0 V

VOUT = 0 V

Typ. Max. Unit

Rev: 1.01a 2/2006

12/27

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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