GS816218B Datasheet, PDF (10/41 Pages) GSI Technology – 1M x 18, 512K x 36, 256K x 72 18Mb Sync Burst SRAMs

GS816218(B/D)/GS816236(B/D)/GS816272(C)
GS816218/36 (PE = 1) x32 Mode Block Diagram
A0–An
LBO
ADV
CK
ADSC
ADSP
GW
BW
BA
BB
BC
BD
Register
DQ
A0
A1
A0
D0
Q0 _A1
D1
Q1
Counter
Load
Register
DQ
Register
DQ
Register
DQ
Register
DQ
Register
DQ
Register
E1
DQ
Register
DQ
FT
G
Power Down
ZZ
Control
Note: Only x36 version shown for simplicity.
SCD
A
Memory
Array
Q
36
4
D
36
4
Parity
Encode
32
36
Register
DQ
32
Register
DQ
32
DQx1–DQx8
32
36
4
32
Parity
Encode
4
Parity
Compare
NC
NC
Rev: 2.17 11/2004
10/41
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology