GS2965 Datasheet, PDF (19/41 Pages) Gennum Corporation – Uses standard 27MHz crystal

mode, the signal is tapped off at the output of the equalizer stage, prior to the high gain
buffers.
The threshold setting within the detector can be adjusted to increase or decrease its
sensitivity. Gennum recommends using the least sensitive threshold level. This provides
the most margin against false de-assertion of LOS.
Table 4-5: Suggested LOS Threshold Settings
Input Signal
Amplitude
>250mV
200mV to 250mV
150mV to 200mV
<150mV
LOS Detection
Method Select
0x1
0x1
0x1
0x1 or 0x0
LOS Threshold
Adjust
0x0
0x1
0x2
0x3
The LOS mode can be selected by using the host interface, in register TOP_1 (address
0x02).
4.7 Serial Digital Reclocker
The output of the Equalizer is fed to the reclocker. The function of the reclocker is to
re-time the input signal and to generate system clocks.
The reclocker operates at three data rates; 2.97Gb/s, 1.485Gb/s and 270Mb/s, and
provides a minimum input jitter tolerance of 0.8UI to square-wave-modulated jitter at
these rates.
When there is no serial input signal, the internal clock maintains a frequency close to the
expected incoming data rate by locking to the external reference crystal.
4.8 Lock Detection
The lock detect block indicates, via the active-high LOCKED signal, when the device has
achieved lock to the incoming data stream.
The lock logic within the GS2965 includes a system that monitors the frequency and the
phase of the incoming data, as well as a monitor to detect harmonic lock.
Table 4-6: Lock Operation
LOCKED
HIGH
LOW
Status
Locked
Not locked
The LOCKED output signal is also available via the host interface.
GS2965 Multi-Rate SDI Reclocker with Equalization &
De-emphasis
Data Sheet
52462 - 4
July 2012
19 of 41
Proprietary & Confidential