MB85RC64PNF-G Datasheet, PDF (9/20 Pages) Fujitsu Component Limited. – 64 K (8 K × 8) Bit I2C

MB85RC64
• Current Address Read
When the previous write or read operation finishes successfully up to the stop command and if the last
accessed address is taken to be “n”, then the address at “n+1” is read by sending the following command
unless turning the power off. If the end of the address range is reached internally, the address counter will
roll over to 0000H. The current address is undefined immediately after the power is turned on.
Access from master
Access from slave
(n+1) address
S 1 0 1 0 A2 A1 A0 1 A
Read
Data 8bits
NP
S Start Condition
P Stop Condition
A ACK
N NACK
• Random Read
The one byte of data at the address as saved in the buffer can be read out synchronously to SCL by specifying
the address in the same way as for a write, and then issuing another start condition and sending the Control
Byte (R/W = 1).
The final NACK is issued by the receiver that receives the data. In this case, this bit is issued by the master
side.
n address
S 1 0 1 0 A2 A1 A0 0 A
Address
High 8bits
A
Address
Low 8bits
A S 1 0 1 0 A2 A1 A0 1 A
Read
Data 8bits
NP
Access from master
Access from slave
S Start Condition
P Stop Condition
A ACK
N NACK
DS05–13109–3E
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