MB15F86UL Datasheet, PDF (9/28 Pages) Fujitsu Component Limited. – Fractional-N PLL Frequency Synthesizer

MB15F86UL
(2) Data Setting
• RF synthesizer Data Setting (Fractional-N)
The divide ratio can be calculated using the following equation :
fVCORF = NTOTAL × fosc÷R
NTOTAL = P × N + A + F / Q ← (A < N − 2, F < Q)
fVCORF : Output frequency of external voltage controlled oscillator (VCO)
NTOTAL : Total division ratio from prescaler input to the phase detector input
fosc
: Output frequency of the reference frequency oscillator
R
: Preset divide ratio of binary 8 bit reference counter (3 to 255)
P
: Preset divide ratio of modulus prescaler (16 or 32)
N
: Preset divide ratio of binary 10 bit programmable counter (18 to 1023)
A
: Preset divide ratio of binary 5 bit swallow counter (0 to 31)
F
: A numerator of fractional-N (0 to 15)
Q
: A denominator of fractional-N, modulo 3 to 16
Note : When Q is set more than 10, a prescaler ratio should be set 32.
• Binary 8-bit Programmable Reference Counter Data Setting (RF1 to RF8)
Divide ratio (R) RF8
RF7
RF6
RF5
RF4
RF3
RF2
RF1
3
0
0
0
0
0
0
1
1
4
0
0
0
0
0
1
0
0


52
0
0
1
1
0
1
0
0


255
1
1
1
1
1
1
1
1
Note : Divide ratio less than 3 is prohibited.
• Fractional-N numerator of the fractional accumulator Data Setting (F1 to F4)
Setting value(F) F4
F3
F2
F1
0
0
0
0
0
1
0
0
0
1
2
0
0
1
0





15
1
1
1
1
Note : F < Q
• Fractional-N denominator of the fractional accumulator Data Setting (Q1 to Q5)
Setting value(Q) Q5
Q4
Q3
Q2
Q1
3
0
0
0
1
1
4
0
0
1
0
0
5
0
0
1
0
1






16
1
0
0
0
0
Note : F < Q
9