MB15F03SL Datasheet, PDF (7/25 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F03SL
(Continued)
Parameter
Symbol
Condition
“L” level output current
Charge pump
current rate
DoIF
DoRF
IDOL/IDOH
vs VDO
vs Ta
IDOL
IDOMT^*5
IDOVD^*6
IDOTA^*7
VCC = 3 V,
VDOL= VCC/2,
Ta = +25°C
CS bit = “H”
CS bit = “L”
VDO = VCC/2
0.5 V ≤ VDO ≤ VCC – 0.5 V
–40°C ≤ Ta ≤+ 85°C,
VDO = VCC/2
(VCC = 2.4 to 3.6 V, Ta = –40 to +85°C)
Min.
–
–
Value
Typ.
6.0
1.5
Unit
Max.
–
mA
–
–
3
–
%
–
10
–
%
–
10
–
%
*1: Conditions; fosc = 12 MHz, Ta = +25°C, in locking state.
*2: VCCIF = VCCRF = 3.0 V, fosc = 12.8 MHz, Ta = +25°C, in power saving state.
*3: AC coupling. 1000pF capacitor is connected under the condition of min. operating frequency.
*4: The symbol “–” (minus) means direction of current flow.
*5: VCC = 3.0 V, Ta = +25°C (|I3| – |I4|)/[(|I3| + |I4|)]/2] × 100(%)
*6: VCC = 3.0 V, Ta = +25°C [(|I2| – |I1|)/2]/[(|I1| + |I2|)/2] × 100(%) (Applied to each IDOL, IDOH)
*7: VCC = 3.0 V, [|IDO(85°C) – IDO(–40°C)|/2]/[IDO(85°C) + IDO(–40°C)|/2] × 100(%) (Applied to each IDOL, IDOH)
*8: Prescaler divide ratio C/P current fin operating frequency Input sensitivity
16/17
1.5 mA mode 50 MHz fin 600 MHz –15 dBm
6.0 mA mode 50 MHz fin 300 MHz –15 dBm
300 MHz < fin 600 MHz –10 dBm
8/9
1.5 mA mode 50 MHz fin 300 MHz –15 dBm
300 MHz < fin 600 MHz* –15 dBm
6.0 mA mode 50 MHz fin 300 MHz –15 dBm
300 MHz < fin 600 MHz* –10 dBm
* : VCC = 3.0 V to 3.6 V at 600 MHz
I1
I3
IDOL
I2
IDOH
I2
I4
I1
0.5
VCC/2 VCC − 0.5 V VCC
Charge Pump Output voltage (V)
7