MBM29DL640E80 Datasheet, PDF (52/71 Pages) Fujitsu Component Limited. – 64 M (8 M X 8/4 M X 16) BIT Dual Operation

MBM29DL640E80/90/12
Address
CE
OE
WE
Read
tRC
BA1
Command
tWC
BA2
(555h)
tAS
tAH
Read
tRC
BA1
tACC
tCE
Command
tWC
BA2
(PA)
Read
tRC
Read
tRC
BA1
BA2
(PA)
tAS
tAHT
tOE
tCEPH
tGHWL
tOEH
tWP
tDS ^tDH
tDF
tDF
DQ
Valid Valid
Output Intput
Valid Valid
Output Intput
Valid
Output
Status
(A0H)
(PD)
Note : This is example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2.
BA1 : Address corresponding to Bank 1
BA2 : Address corresponding to Bank 2
Figure 11 Bank-to-Bank Read/Write Timing Diagram
Enter
Embedded
Erasing
WE
DQ6
Erase
Suspend
Enter Erase
Suspend Program
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase
Resume
Erase Suspend
Read
Erase
DQ2
Toggle
DQ2 and DQ6
with OE
Note : DQ2 is read from the erase-suspended sector.
Figure 12 DQ2 vs. DQ6
52
Erase
Complete