MB40C338 Datasheet, PDF (5/18 Pages) Fujitsu Component Limited. – 3 ch 8-bit 162 MSPS A/D Converter

s BLOCK DIAGRAM
MB40C338
VESD VREFT VREFB AVDD DVDD
VRTM VRT VRB VRBM VR1 VR2 VR3
PCLP
RADIN
RVIN
RVCLP
CE
R
R
× 1.9
VREF AMP
Block
OF
AMP + CLAMP + A/D
× 3 ch
A ch
8
8
8 bit A/D
Buffer
RDA0
∼ RDA7
B ch
8
8
8 bit A/D
Buffer
RDB0
∼ RDB7
PLL
Block
2 bit (0 ∼ 3 CLK)
CLK Delay
Delay
6 bit (32 divide, 2CLK)
RESET _1/2
Buffer
Buffer
Buffer
Buffer
ADCLKA
ADCLKB
AVSS
DVSS
DSYNC
DSYNCB
HSYNC
POL
(1 bit)
PD
CP
VCO
MUX
DIV
2 bit
(1 ∼ 1/8)
Buffer
Buffer
CLK
CLKB
HHOLD
Counter
(12 bit)
11 bit Shift
COUT
LPF EXPCLKB EXCLK
EXPCLK
Filter
PVSS PVDD CK DATA CS
5