MB40C338 Datasheet, PDF (11/18 Pages) Fujitsu Component Limited. – 3 ch 8-bit 162 MSPS A/D Converter

MB40C338
s RECOMMENDED VALUE OF SERIAL DATA SETTING
fCLK (MHz)
fHSYNC (kHz) Counter
UXGA
162.000
75.000
2160
157.500
91.146
1728
SXGA
135.000
81.130
1664
108.000
64.904
1664
94.500
68.677
1376
XGA
78.750
75.000
60.023
56.476
1312
1328
65.000
48.363
1344
56.250
53.674
1048
SVGA
50.000
49.500
48.077
46.875
1040
1056
40.000
37.879
1056
36.000
43.269
832
VGA
31.500
25.175
37.861
832
31.469
800
25.149
31.436
800
29.375
15.625
1880
PAL
22.031
15.625
1410
14.688
15.625
940
24.545
15.734
1560
NTSC
18.409
15.734
1170
12.273
15.734
780
VCO select : VCOH (fVCO = 85 MHz to 162 MHz)
VCOL (fVCO = 75 MHz to 140 MHz)
fCLK = fHSYNC × Counter
fVCO = fHSYNC × Counter/Divider
Icp (mA) VCO select
0.5
VCOH
0.5
VCOH
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5
VCOL
0.5
VCOH
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5
VCOL
0.5
VCOH
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5 VCOH or VCOL
0.5
VCOH
0.5 VCOH or VCOL
Divider
1/1
1/1
1/1
1/1
1/1
1/1
1/2
1/2
1/2
1/2
1/2
1/2
1/4
1/4
1/4
1/4
1/4
1/4
1/8
1/4
1/8
1/8
fVCO (MHz)
162.000
157.500
135.000
108.000
94.500
78.750
150.000
130.000
112.500
100.000
99.000
80.000
144.000
126.000
100.700
100.596
117.500
88.125
117.500
98.180
147.270
98.180
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