MB39A115 Datasheet, PDF (4/42 Pages) Fujitsu Component Limited. – 5 ch DC/DC Converter IC with Synchronous Rectification

MB39A115
■ PIN DISCRIPTIONS
Block
name
Pin No.
TSSOP BCC
Pin name
I/O
Description
36
37
38
ch.1
34
33
FB1
O Error amplifier output terminal.
34 −INE1 I Error amplifier inverted input terminal.
35
CS1
⎯ Soft-start setting capacitor connection terminal.
31
OUT1-1
O
P-ch drive output terminal.
(External main side FET gate driving)
33
30
OUT1-2
O
N-ch drive output terminal.
(External synchronous rectification side FET gate driving) .
4
40
DTC2
I Dead time control terminal.
3
ch.2
2
1
39
FB2
O Error amplifier output terminal.
38 −INE2 I Error amplifier inverted input terminal.
37
CS2
⎯ Soft-start setting capacitor connection terminal.
32
29 OUT2 O P-ch drive output terminal.
16
12
DTC3
I Dead time control terminal.
17
ch.3 18
19
13
FB3
O Error amplifier output terminal.
14 −INE3 I Error amplifier inverted input terminal.
15
CS3
⎯ Soft-start setting capacitor connection terminal.
31
28 OUT3 O P-ch drive output terminal.
23
20
DTC4
I Dead time control terminal.
22
19
FB4
O Error amplifier output terminal.
ch.4 21
20
30
18 −INE4 I Error amplifier inverted input terminal.
17
CS4
⎯ Soft-start setting capacitor connection terminal.
27 OUT4 O P-ch drive output terminal.
24
21
DTC5
I Dead time control terminal.
25
22
FB5
O Error amplifier output terminal.
ch.5 26
27
29
23 −INE5 I Error amplifier inverted input terminal.
24
CS5
⎯ Soft-start setting capacitor connection terminal.
26 OUT5 O N-ch drive output terminal.
13
9
OSC
12
8
CT
⎯ Triangular wave frequency setting capacitor connection terminal.
RT
⎯ Triangular wave frequency setting resistor connection terminal.
(Continued)
4