MB88146A Datasheet, PDF (3/20 Pages) Fujitsu Component Limited. – D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp., low-voltage)

MB88146A
s PIN DESCRIPTION
Pin no.
1 to 4
5 to 12
13
14
15 to 18
19
20
21
22
23
24
Pin name
AO1 to AO4
D11/AO5 to
D4/AO12
VDD*¹
VCCD*¹
D3 toD0
CLK*²
SI*²
SO
CS*²
VCCA*¹
GND
Description
D/A converter analog output pins (VDD to GND output).
(Default: output #00 setting level)
These pins may be used either as I/O expander parallel input/output (VCCA/
GND output 0.5 VCCA/0.2 VCCA input) or D/A converter analog output (VDD to
GND output).
Pin status is controlled by input data.
See “sData Configuration”. (Default: Input mode, Hi-Z state)
D/A converter reference power pin.
MCU interface power supply pin (power supply for I/O expander).
I/O expander parallel input/output pins.
(VCCD/GND output: When VCCD 4.0 V, 0.5 VCCD/0.2 VCCD input,
When VCCD < 4.0 V, 2 V/0.2 VCCD input)
Pin status is controlled by input data.
See “sData Configuration.” (Default: Input mode, Hi-Z state)
Shift clock signal input pin.
When CS = “L,” SI data is loaded into the shift register at the rising edge of the
shift clock.
Data input pin (serial input pin).
Used for 16-bit serial data input.
Data output pin (serial output pin).
The first bit (LSB) data of the 16-bit shift register is output simultaneously with
the falling edge of the shift clock.
When CS output = “H,” this pin goes to high impedance state.
Chip select signal input pin.
Input to shift registers is enabled when the CS signal falling edges. Shift register
contents can be executed when the CS signal rising edges.
Analog unit power supply pin (OP amplifier power supply).
Common GND pin.
*1: Be sure that VCCA VCCD, and that VCCA VDD.
*2: Do not leave this pin in floating state.
3