MB88146A Datasheet, PDF (17/20 Pages) Fujitsu Component Limited. – D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp., low-voltage)

MB88146A
s DATA INPUT/OUTPUT TIMING
MB88146A Data Input/Output Timing (Serial Bus Format)
• D/A converter operation, and I/O expander (serial → parallel conversion) operation, and ESR writing operation.
SI
CLK
CS
AO×
D××
SO
D0
D1
D2
1
2
3
DE
DF
15
16
Data input is enabled at the falling edge of the CS signal. 16-bit data is input, and the shift register command is
executed at the rising edge of CS.
In D/A converter operation, the analog output selected at the rising edge of CS is the conversion result. In serial
→ parallel conversion, the digital output selected at the rising edge of CS is the conversion result. In ESR write
operation, ESR data is set and pin status determined at the rising edge of CS.
• I/O expander (parallel → serial conversion) operation
SI
D0
DF
CLK
1
16
1
2
16
CS
D××
Retrieved parallel data
SO
D0
DF
Parallel-to-serial → Conversion result output
Data input is enabled at the falling edge of the CS signal. 16-bit data (parallel → serial conversion commands)
is input and commands accepted at the rising edge of CS. At the falling edge of CS, data from the parallel input
is loaded into bits D4 to DF of the shift register, and output from the SO pin timed to the falling edge of the CLK
signal.
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