MB84VA2004 Datasheet, PDF (23/29 Pages) Fujitsu Component Limited. – 8M (x 8) FLASH MEMORY & 1M (x 8) STATIC RAM

MB84VA2004-10/MB84VA2005-10
• Write Cycle (SRAM)
Parameter
Symbol
Parameter Description
tWC
Write Cycle Time
tWP
Write Pulse Width
tCW
Chip Enable to End of Write
tAS
Address Setup Time
tWR
Write Recovery Time
tODW WE Low to Output High-Z
tOEW WE High to Output Active
tDS
Data Setup Time
tDH
Data Hold Time
• Write Cycle (Note 4) (WE control) (SRAM)
tWC
ADDRESSES
tAS
tWP
WE
tCW
CE1s
Min.
100
60
80
0
0
—
0
60
0
Max.
Unit
—
ns
—
ns
—
ns
—
ns
—
ns
40
ns
—
ns
—
ns
—
ns
tWR
CE2s
tCW
tODW
tOEW
DOUT
DIN
Note 2
Note 5
tDS
tDH
VALID DATA IN
Note 3
Note 5
Notes: 2.If CE1s goes LOW (or CE2s goes HIGH) coincident with or after WE goes LOW, the
output will remain at high impedance.
3.If CE1s goes HIGH (or CE2s goes LOW) coincident with or before WE goes HIGH, the
output will remain at high impedance.
4.If OE is HIGH during the write cycle, the outputs will remain at high impedance.
5.Because I/O signals may be in the output state at this Time, input signals of reverse
polarity must not be applied.
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