MB15F02 Datasheet, PDF (18/24 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F02
s REFERENCE INFORMATION
Typical plots measured with the
test circuit are shown below.
Each plot shows lock up time,
phase noise and reference
leakage.
S.G
Spectrum
Analyzer
Test Circuit
OSCin
Do
LPF
fin
VCO
• fvco = 1018 MHz
• Kv = 20 MHz/v
• fr = 200 kHz
• fosc = 13 MHz
• LPF:
15 kΩ
2000 pF
2.2 kΩ
330 pF
20000 pF
PLL Lock Up Time = 440 µs
(1005.000 MHz → 1031.000 MHz, within ± 1kHz)
PLL Phase Noise
@ within loop band = 75.5 dBc/Hz
∆ MKr x : 439.90929 µs
y : 25.99986 MHz
30.00300
MHz
A evts N/A
REF –10.0 dBm ATT 10 dB
10dB/
1.000
kHz/div
29.99800
MHz
10.2449 µs
1.9902449 ms
RBW
300 Hz
SAMPLE
VBW
300 Hz
SPAN 50.0 kHz CENTER 1.0180000 GH z
PLL Lock Up Time = 440 µs
(1031.000 MHz → 1005.000 MHz, within ± 1kHz)
PLL Reference Leakage
@ 200 kHz offset = 71.4 dBc
∆ MKr x : 440.02236 µs
y : –26.00006 MHz
30.00300
MHz
REF
10dB/
–10.0 dBm ATT 10 dB
1.00
kHz/div
RBW
10 kHz
SAMPLE
VBW
10 kHz
29.99800
MHz
10.1378 µs
1.9901378 ms
SPAN 1.00 MHz CENTER 1.01800 GHz
18