MB85RS256_09 Datasheet, PDF (16/20 Pages) Fujitsu Component Limited. – Memory FRAM CMOS 256 K (32 K × 8) Bit SPI

MB85RS256
■ POWER ON/OFF SEQUENCE
tpd
VCC
3.0 V
VIH (Min)
tr
tpu
VCC
3.0 V
VIH (Min)
1.0 V
VIL (Max)
1.0 V
VIL (Max)
GND
GND
CS
CS >VCC × 0.8*
* : CS (Max) < VCC + 0.5 V
CS : don't care
CS >VCC × 0.8*
CS
Note :
• Because turning the power-on from an intermediate level may cause malfunctions, when the power
is turned on, VCC is required to be started from 0 V.
• If the device does not operate within the specified conditions of read cycle, write cycle, power on/
off sequence, memory data can not be guaranteed.
Parameter
CS level hold time at power OFF
CS level hold time at power ON
Power supply rising time
Value
Symbol
Unit
Min
Max
tpd
85
⎯
ns
tpu
85
⎯
ns
tr
0.05
200
ms
■ NOTES ON USE
After the IR reflow completed, it is not guaranteed to save the data written prior to the IR reflow.
16
DS05-13105-3E