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MB86064 Datasheet, PDF (1/4 Pages) Fujitsu Component Limited. – Dual 14-bit 1GSa/s DAC
Product Flyer
Mixed Signal Division
MB86064
Dual 14-bit 1GSa/s DAC
October 2004
Version 1.1
FME/MS/DAC80/FL/5085
The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog
converter (DAC), delivering exceptional dynamic performance.
Each high performance DAC core is capable of generating
multi-standard, multi-carrier communication transmit signals,
suitable for 2, 2.5 and 3G systems. DAC data is input via two
high-speed LVDS ports. These operate in a pseudo double data
rate (DDR) mode, with data latched on both rising and falling
edges. Alternatively, the device can be configured as a
multiplexed dual-port single DAC. To simplify system
integration the DAC operates from a clock running at half the
DAC conversion rate.
PLASTIC PACKAGE
EFBGA-120
Package Dimensions
12 mm x 12 mm
Features
• Dual 14-bit, 1GSa/s Digital to Analog conversion
• Exceptional dynamic performance
• 74dBc ACLR for 4 UMTS carriers @ 276MHz direct-IF
• 100MHz image-free generated bandwidth capability
• supports UMTS plus digital pre-distortion bandwidth
• Proprietary performance enhancement features
• LVDS data interface
• Register selectable on-chip LVDS termination resistors
• Fujitsu 4-wire serial control interface
• Two 16k point programmable on-chip waveform memories
• Low power 3.3V analog and 1.8V digital operation
• 750mW per DAC power dissipation at 1GSa/s
• 0.18µm CMOS technology with Triple Well
• Performance enhanced EFBGA package
• Industrial temperature range (-40°C to +85°C)
PIN ASSIGNMENT
AC19 AC17 AC15 AC13 AC11 AC9
AC7
AC5
AB18 AB16 AB14 AB12 AB10 AB8
AB6
AA19 AA17 AA15 AA13 AA11
AA9
AA7
AA5
Y18
Y16
Y14
Y12
Y10
Y8
Y6
X_A9
A9
DVDD
X_A7
A7
X_A5
A5
DVDD
X_A4
A4
X_A2
A2
DVDD
DVDD
DVSS
W23
W21
X_A10
V22
V20 A10
U23
U21
DVSS
T22
T20 X_A8
R23
R21
A8
P22 P20 X_A6
N23
N21
A6
M22 M20 DVSS
L23
L21
X_A3
K22
K20 A3
J23
J21
X_A1
H22
H20 A1
G23
G21
DVSS
F22
F20 NC
E23
E21
NC
R14
R12
R10
P15
P13
P11
P9
N14
N12
N10
M15
M13
M11
M9
L14
L12
L10
K15
K13
K11
K9
J14
J12
J10
All centre pins : TG
X_B10
B10
DVSS
X_B8
B8
X_B6
B6
DVSS
X_B3
B3
X_B1
B1
DVSS
NC
NC
W3
W1
V4
V2
U3
U1
T4
T2
R3
R1
P4
P2
N3
N1
M4
M2
L3
L1
K4
K2
J3
J1
H4
H2
G3
G1
F4
F2
E3
E1
X_B9
B9
DVDD
X_B7
B7
X_B5
B5
DVDD
X_B4
B4
X_B2
B2
DVDD
DVDD
DVSS
Applications
• Multi-carrier, Multi-standard cellular infrastructure
• CDMA, W-CDMA, GSM/EDGE, UMTS
• Wideband communications systems
• High Direct-IF architectures
• Arbitrary waveform generation
• Test equipment
• Radar, video & display systems
D18
D16
D14
D12
D10
D8
D6
C19
C17
C15
C13
C11
C9
C7
C5
B18
B16
B14
B12
B10
B8
B6
A19
A17
A15
A13
A11
A9
A7
A5
Index
Not to scale. Viewed from above.
Copyright © 2004 Fujitsu Microelectronics Europe GmbH
Production
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.