English
Language : 

UMFT230XA-02 Datasheet, PDF (6/21 Pages) Future Technology Devices International Ltd. – UMFT230XA USB to Basic UART Development Module
UMFT230XA Datasheet
Version 1.4
D oc ument Reference N o.: FT _000519 C learance N o.: FT DI# 2 6 9
4.2 Signal Descriptions
Pin
No.
J1-1,
J2-8
J1-2
J1-3
J1-4
J1-5
J1-6
J1-7
J1-8
J2-1
J2-2
J2-3
J2-4
J2-5
J2-6
J2-7
Name Type
Description
GND
PWR
Module Ground Supply Pins
3V3OUT
Power
Input/
Output
3.3V output from integrated LDO regulator. This pin is decoupled with a 100nF
capacitor to ground on the PCB module. The prime purpose of this pin is to provide
the 3.3V supply that can be used internally. For power supply configuration details
see section 5.
VC CIO
Power
Input
+1.8V to +3.3V supply to the UART Interface and CBUS I/O pins. For power supply
configuration details see section 5.
RESET# Input
FT230X active low reset line. Configured with an on board pull-up and recommended
filter capacitor.
C TS#
Input C lear To Send C ontrol Input / Handshake Signal.
RTS#
Output Request to Send Control Output / Handshake Signal.
RXD
Input Receiving Asynchronous Data Input.
TXD
Output Transmit Asynchronous Data Output.
SLD
GND
USB C able Shield. Connected to GND via a 0ohm resistor.
VBUS
Power
Output
5V Power output from the USB bus. For a low power USB bus powered design, up to
100mA can be sourced from the 5V supply and applied to the USB bus. A maximum
of 500mA can be sourced from the USB bus in a high power USB bus powered design.
C urrents up to 1A can be sourced from a dedicated charger and applied to the USB
bus.
VC C
Power
Input
5V power input for FT230X. For power supply configuration details see section 5.
C BUS3 I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. . See C BUS Signal Options, Table 4.2.
C BUS2 I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM.. See CBUS Signal Options, Table 4.2.
C BUS1 I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM.. See CBUS Signal Options, Table 4.2.
C BUS0 I/O
C onfigurable CBUS I/O Pin. Function of this pin is configured in the device internal
MTP ROM. See CBUS Signal Options, Table 4.2.
Table 4.1 – Module Pin Out Description
Copyright © Future Technology Devices International Limited
6