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MCIMX257DJM4A Datasheet, PDF (98/153 Pages) Freescale Semiconductor, Inc – i.MX25 Applications Processor for Consumer and Industrial Products
SIMx_SVENy
SIMx_RSTy
SIMx_CLKy
SIMx_DATAy_RX_TX
1
RESPONSE
2
3
3
T0
T1
Figure 70. Active-Low-Reset SIM Card Reset Sequence
Table 76 defines the general timing requirements for the SIM interface.
Table 76. Timing Specifications, Active-Low-Reset SIM Card Reset Sequence
Ref No.
1
2
3
Min.
—
400
40,000
Max.
200
40,000
—
Unit
clk cycles
clk cycles
clk cycles
3.7.14.2 SIM Power-Down Sequence
Figure 71 shows the SIM interface power-down AC timing diagram. Table 77 shows the timing
requirements for parameters (SI7–SI10) shown in the figure.
The power-down sequence for the SIM interface is as follows:
• SIMx_SIMPDy port detects the removal of the SIM Card
• SIMx_RSTy is negated
• SIMx_CLKy is negated
• SIMx_DATAy_RX_TX is negated
• SIMx_SVENy is negated
Each of the above steps requires one CKIL period (usually 32 kHz). Power-down may be initiated by a
SIM card removal detection; or it may be launched by the processor.
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 9
98
Freescale Semiconductor