MCIMX25_09 Datasheet, PDF (97/132 Pages) Freescale Semiconductor, Inc – i.MX25 Applications Processor for Consumer and Industrial Products

SI10
SIMx_SIMPDy
SIMx_RSTy
SIMx_CLKy
SIMx_RXy & SIMx_TXy
SIMx_VENy
SI7
SI8
SI9
Figure 71. SmartCard Interface Power Down AC Timing
Table 73. Timing Requirements for Power-down Sequence
ID
PARAMETER
SI7 SIM reset to SIM clock stop
SI8 SIM reset to SIM Tx data low
SI9 SIM reset to SIM voltage enable low
SI10 SIM presence detect to SIM reset low
SYMBOL
S_rst2clk
S_rst2dat
S_rst2ven
S_pd2rst
Min.
0.9 × 1/Fckil
1.8 × 1/Fckil
2.7 × 1/Fckil
0.9 × 1/Fckil
Max.
1.1 × 1/Fckil
2.2 × 1/Fckil
3.3 × 1/Fckil
1.1 × 1/Fckil
Unit
ns
ns
ns
ns
3.6.15 System JTAG Controller (SJC) Timing
Figure 72 through Figure 75 show respectively the test clock input, boundary scan, test access port, and
TRST timings for the SJC. Table 74 describes the SJC timing parameters (SJ1–SJ13) indicated in the
figures.
TCK
(Input)
SJ1
SJ2
SJ2
VIH
VM
VM
VIL
SJ3
SJ3
Figure 72. Test Clock Input Timing Diagram
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 2
Freescale Semiconductor
97