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MC9S08PA60 Datasheet, PDF (8/35 Pages) Freescale Semiconductor, Inc – MC9S08PA60 Series
Nonswitching electrical specifications
Table 2. DC characteristics (continued)
Symbol
VIH
VIL
Vhys
|IIn|
|IOZ|
|IOZTOT|
RPU
RPU3
IIC
CIn
VRAM
C
Descriptions
Min
P
Input high
voltage
P
Input low
voltage
C
Input
hysteresis
All digital inputs
All digital inputs
All digital inputs
VDD>4.1V
VDD>2.7V
VDD>4.1V
VDD>2.7V
—
0.70 × VDD
0.85 × VDD
—
—
0.06 × VDD
P Input leakage All input only pins VIN = VDD or
—
current
(per pin)
VSS
P
Hi-Z (off- All input/output (per VIN = VDD or
—
state) leakage
pin)
VSS
current
C Total leakage All input only and I/O VIN = VDD or
—
combined for
VSS
all inputs and
Hi-Z pins
P
Pullup
All digital inputs,
—
17.5
resistors when enabled (all I/O
pins other than PTA5/
IRQ/TCLK/RESET
P
Pullup
PTA5/IRQ/TCLK/
—
17.5
resistors
RESET
D DC injection
Single pin limit
VIN < VSS,
-0.2
current4, 5, 6
Total MCU limit,
VIN > VDD
-5
includes sum of all
stressed pins
C
Input capacitance, all pins
—
—
C
RAM retention voltage
—
2.0
Typical1
—
—
—
—
—
0.1
0.1
—
—
—
—
—
—
—
Max
—
—
0.35 × VDD
0.30 × VDD
—
Unit
V
V
mV
1
µA
1
µA
2
µA
52.5
kΩ
52.5
kΩ
2
mA
25
8
pF
—
V
1. Typical values are measured at 25 °C. Characterized, not tested.
2. Only PTB4, PTB5, PTD0, PTD1, PTE0, PTE1, PTH0, and PTH1 support ultra high current output.
3. The specified resistor value is the actual value internal to the device. The pullup value may appear higher when measured
externally on the pin.
4. All functional non-supply pins, except for PTA5, are internally clamped to VSS and VDD.
5. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the large one.
6. Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If the positive injection current (VIn > VDD) is higher than IDD, the injection current may flow out of VDD and could
result in external power supply going out of regulation. Ensure that external VDD load will shunt current higher than
maximum injection current when the MCU is not consuming power, such as no system clock is present, or clock rate is
very low (which would reduce overall power consumption).
Table 3. LVD and POR Specification
Symbol
C
Description
Min
Typ
Max
Unit
VPOR
D
POR re-arm voltage1
1.5
1.75
2.0
V
VLVDH
C
Falling low-voltage detect
4.2
4.3
4.4
V
threshold - high range (LVDV
= 1)2
Table continues on the next page...
MC9S08PA60 Series Data Sheet, Rev. 1, 10/9/2012.
8
Freescale Semiconductor, Inc.